ADS8344 in Electronic Data Processing of High Voltage Transformer h

This article describes the electronic transformer is measured using Rogowski coil current

? Principle of measurement using capacitance voltage divider, high-speed low power A / D chip and DSP processors, high-pressure side to complete the real time data processing, and then the E / O conversion, to optical fiber as a signal transmission medium, the high side conversion of pulse signals to measure the low pressure side of the protection of hybrid electronic photoelectric combined transformer. 1 Electronic Transformer High Side Data Processing System Electronic Transformer High Side signal data processing system consists of pretreatment, A / D converter, DSP Master and E / O conversion of four parts. Signal preprocessing part of receiving a variety of sensor head and measuring the analog signal to some of their pretreatment. For example: Rogowski coil electromotive force induced by an integrator be transformed into the same phase with a current proportional to the voltage signal; sensor head analog signal must be measured voltage regulator, and to consider a certain margin, to meet the A / D-chip analog channels to allow input range. A / D conversion part of the master key is in the DSP chips under the control of real-time transforms the analog signal into digital signal. E / O conversion section is the digital signal into a pulse modulated signal, and then transferred to the low pressure side of the fiber. 2 ADS8344 the main features of 2.1 ADS8344 structural characteristics ADS8344 is a high-speed, low power, 16-bit successive approximation ADC, with 2.7V to 5V single power supply, the maximum sampling rate of 100kHz, SNR up to 84dB? With serial interface It contains eight single-ended analog input channels (CH0 ~ CH7)? also be synthesized as four differential inputs. 100kHz, typical power consumption of 10mV. VREF Reference voltage range from 500mV to VCC, the appropriate channel for each analog input from 0V to VREF. Comes with sample / hold function, a 20-pin or 20-pin SSOP package QSDP package, operating temperature range is -40 ~ +85 . The chip is suitable for application in battery-powered systems (such as personal digital assistants, mobile communications) and the test device. ADS8344 mainly by the multi-switch, sample / hold device, the reference voltage, A / D converter, comparator, control logic circuit and the successive approximation register (SAR) and other components, its internal structural principle shown in Figure 1 said. 2.2 ADS8344 the pin arrangement and description ADS8344 pin arrangement shown in Figure 2, the pins as follows: CH0 ~ CH7: analog input channel inputs, 8 single-ended analog input channels can be combined for the two-terminal differential input, all channels of the input range from 0V to + VREF, unused input channel to be connected GND to avoid the noise input. COM: analog input reference, the single-ended input channels of the zero position point directly to ground or ground potential reference point. SHDN: Power-down control bits, while for the low, switch to low power chip power-down mode. + VCC: Power input range of +2.7 V ~ +5 V. DOUT: serial data output, the data output when the falling edge of DCLK, when CS is high, the output is high impedance state. DIN: serial data input, when CS is low, data is latched in the rising edge of DCLK. DCLK: external clock input, the decision of the external clock chip conversion rate (fDCLK = 24fSAMPLE). CS: chip select terminal for the low, select the chip. GND: Reference ground. VREF: Reference power supply input. BUSY: D conversion status output pin. As for analog-digital conversion, the output pin low, generate a falling edge when BUSY end, the end of that analog-digital conversion, data output valid. 2.3 ADS8344 features the work of ADS8344 control register is an 8-bit write-only register, the data from the DIN pin, when the computer reads the complete results of the previous conversion, a conversion channel under the control byte written to the DIN pin requires eight DCLK clock control information to the complete write control register. Members function control register as follows: S: Start bit control byte for byte input high when that effective. A2 ~ A0: analog input channels select bit. SGL / DIF: analog input select bit. When is high for single-ended input; is low, for the double-ended differential input. PD1 ~ PD0: Power management options position. (1) analog input channels ADS8344 to 8 analog input channels can be set to single-ended input or differential input. Single-ended input, each analog channel input + IN signal from the COM pin access-IN signal. Double-differential input

ADS8344 in Electronic Data Processing of High Voltage Transformer h

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