Omap5910 Real-time Image System Dma Data Transfer - Multimedia, Fpga, Dma-communications Industry

Introduction Real-time image processing system characterized by a significantly

large volume of data efficiently processing and transmission of image data is real-time image processing system, the key, TI has introduced a high-performance multimedia dual-core processor OMAP5910, is a high-performance, low power consumption and control performance TMS320C55xDSP strong ARM925 microprocessor integrated into a single chip device how to effectively play the advantages of dual-core, rational use of a variety of memory configurations OMAP5910 DMA controller in real time, efficient large-scale image data transmission is studied focus.

1 OMAP5910 memory management Because OMAP5910 supports a variety of memory, the DMA transfer in the design of the program must be on the OMAP5910's memory management has a detailed understanding.

OMAP5910 in the MPU memory chip integrates 192KB of SRAM, DSP 64KB memory chip integrates two-way DARAM, 96KB of single SARAM, 32KB of program memory PDROM, MPU and DSP subsystem memory map case shown in Figure 1 [1]. By EMIFF and EMIFS interfaces, OMAP5910 chip memory access, but access to off-chip memory chip memory access speed and the speed varies greatly.

OMAP5910 chip memory management unit TC mainly by memory management. TC management MPU, DSP, DMA and local bus on the OMAP5910 system memory resources (SRAM, SDRAM, Flash, ROM, etc.) to access, its main function is to ensure that the processor can efficiently visit external storage areas, to avoid bottlenecks and reduce the chip processing speed, TC through 3 different interfaces-EMIFS, EMIFF or IMIF, support the processor or DMA unit to the memory of the visit. EMIFS interface, which provides Flash, SRAM or ROM access, EMIFF interface provides access to the SDRAM, IMIF interface of the OMAP5910 chip 192KBSRAM visit, three kinds of interface is completely independent of [2], from any one processor or DMA unit can also visit.

ARM core to access DSP core data or memory space required for communication between the ARM and DSP, are mainly three kinds of ways to support the communication between the internal dual-core, the first one kind of dual-core adopted to achieve the shared mailbox register MailBox , ARM and DSP are triggered by MailBox interrupt each other, while two 16-bit parameter passed to notify each other their own state or pass a request, the first 2 ways are MPUI way, ARM DSP via the host interface to be stored on space and I / O space access, the ARM for data in the dual-core inter-move, 3 ways is to set the DSP of the MMU, the DSP's external memory space mapped to the OMAP5910 system memory resources, shared DSP's address space, by the DSP, the data move between the dual-core.

2 OMAP5910 The DMA controller OMAP5910 The DMA controller for real-time image processing system is very important, it can not complete the CPU with the participation of storage space, data movement mapping, flexible use of DMA controller can significantly improve data transmission efficiency.

OMAP5910 The DMA controllers transfer characteristics of common functions as follows:

1) single split operation, with common and dedicated channels, the hardware resources in different ports. All of the data exchange through a request (Request), ready (ready), suspension (abort) signal handshake. DMA channel is time division multiplexing, and its transmission of the basic process shown in Figure 2.

2) multi-frame transmission. Transmission of each block can have more than the number of data frames. Transmitted data size is 8-bit, 16-bit and 32-bit. Bytes can be packaged, unpacking, and bytes transferred count. Can access all the memory address space (physical address mapping and I / O space).

3) DMA read, write, and trigger frame operations are interrupted, each DMA channel can generate a physical interrupt the processor on the transmission of the status of this response, all the DMA interrupt is power Ping interruption [4].

4) back-transfer, high throughput, DMA can be independent of the CPU to PCU clock speed of work and data throughput.

Real-time image processing system of image data much the same time, image processing will also produce large amounts of intermediate data, and OMAP5910 chip resources are limited and can not accommodate the frame of image data and intermediate data, so a large number of The image data must be stored in the chip memory, in order to ensure the system real-time, data from the DMA is responsible for the completion of the move in different storage space, do not take up CPU clock cycles, to avoid most of the time to plug in external CPU access to the deposit, while DMA data rearrangement function can optimize the image data stored in memory, not only can improve the utilization efficiency of internal storage space, but also improve the data transfer rate.

3 OMAP5910 internal and external memory data exchange analysis

A complete real-time image processing in real time not only to capture the image, but also real-time image processing, the real-time image processing system consists of image Sensor , A / D converter, complex programmable logic device FPGA , OMAP5910 dual-core processors, image display devices form. The system's main function is to receive infrared focal plane arrays FPGA real-time sensor output 14-bit video signal, reduced frequency of the DSP after the OMAP5910 processor, the implementation of image processing algorithms, while, OMAP5910's ARM processor to perform complex control instructions, and then by the FPGA cache, by the D / A transform synthetic 10-bit video signal output, also, OMAP5910's ARM processor through the interface to receive Computer The control instructions.

According to the human eye's visual requirements, at least every second imaging system, acquisition and processing of 25 frames of image data, in order to avoid image flicker real-time display of visual sense. For the 320 240 dot-matrix images, A / D is 14, each frame data collection for the 320 240 14 = 1MB, according to the requirements of real-time, data processing and display speed of 320 240 14 25 / s = 3.125MB / s, which need to be completed in 64 s read a line (320 pixels) and write a line (346 pixels), in the only way it without losing the continuity of the image.

To ensure the image processing and display real-time, should make full use of the data transmission channel OMAP5910, OMAP5910 chip and external memory data, shown in Figure 3, the figure gives the OMAP5910 processing real-time image

by: gaga

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