subject: H.264/avc Encoder Score Pixel Interpolation Algorithm Optimization - Encoder, H.264/avc, Chip - The [print this page] Brightness of the pixel interpolation algorithm is simplified adjustment; using JM7.3 reference code to simulate the different fractional-pixel interpolation algorithm, the performance of the encoder by analyzing the coding efficiency of these interpolation algorithms and chip implementation of cost savings can be effectively presented the cost of fractional pixel hardware interpolation algorithm. The results show that the interpolation algorithm can be optimized so that the structure of fractional pixel interpolation hardware costs by 30% or more, while the average coding PSNR (PSNR) and compression rate of only a small loss.
In the design of H.264/AVC video encoder SoC Score pixel motion estimation (FME) module, in order to achieve pixel variable block motion estimation, pixel block match the price SATD (SumofAbsolutehadamardTransformedDifferences) calculation is The minimum order 4 4 pixel block as the basic processing unit [1]. If used directly in the chip design in H.264/AVC video coding standard recommended by the 6th order filter (6-tapFiniteImpulseResponseFilter) to achieve the reference block pixel brightness of 1 / 2 pixel interpolation; each to complete a 1 / 2 pixel interpolation on have read the same row / column 6 to carry out interpolation of adjacent pixels [2,3]. Then, fractional pixel motion estimation module should complete a 4 4 block of the current image of 1 / 2 pixel matching computation, 1 / 2 pixel interpolation unit had to read a reference to the brightness of 10 10 pixels interpolation blocks, do the result is bound to increase the pixel memory reference to access bandwidth, increase the interpolation data register of the number of units to reduce interpolation unit operation efficient; combined, 6-order interpolation filter structure of their hardware is more complex, costly to achieve, it will also further Fractional pixel motion estimation module increases chip area, so in H.264/AVC encoder SoC design process, it is absolutely necessary hardware encoding operation according to the characteristics of coding in the encoder between performance and hardware costs strike a reasonable compromise; on the brightness of pixel interpolation algorithm and implementation to make the necessary structure adjustment and optimization [4]. In this article, software codec to play flexibility of the algorithm; using H.264/AVC codec standard JM7.3 reference code, the four kinds of fractional pixel interpolation algorithms were coded performance simulation, and further analysis of their hardware costs. Accordingly, the chip H.264/AVC encoding optimization of fractional pixel interpolation unit design are discussed.
1, fractional pixel interpolation algorithm to adjust
1.1 interpolation algorithm to adjust
In the H.264/AVC video coding standard in order to get a good codec performance; in fractional pixel motion estimation (FME) process, using the 6-order filter to complete the pixel brightness of 1 / 2 interpolation, simple linear interpolation to complete the pixel brightness of 1 / 4 interpolation [1,2,5,6]. Using this interpolation method, although the code can get a higher peak signal to noise ratio (PSNR) and compression rate, but in the H.264/AVC encoder chip design, or want to significantly reduce the encoder is not the premise of performance conditions, the fractional-pixel interpolation algorithm can be made to save hardware costs and ease of hardware implementation of the adjustment. Therefore with the reference [7] as shown in Table 1, three kinds of brightness of pixel interpolation method of the simplified scores; and by reference to the encoding software simulation to study the interpolation method, respectively encoder performance.
Table 1 Method 4 is the H.264/AVC video coding standard [1] recommended the fractional pixel interpolation. Method 1 to 3 are the basis of the fractional-pixel interpolation for hardware adjustment algorithm. One of the Method 1 and Method 3, for 1 / 2 pixel and 1 / 4 pixel interpolation are using the same interpolation algorithm, so that interpolation to adjust the structure of mind is: can the chip 1 / 2 pixel and 1 / 4 pixel interpolation reuse may provide structure to the hardware configuration is simpler interpolation. Of course, these fractional-pixel motion estimation for (FME) algorithm to adjust the interpolation module had to be coded taking into account the performance of the encoder [8], and only conducive to hardware implementation without significantly reducing the performance of the algorithm code is the value adjustment of.
1.2 fractional pixel interpolation method of coding performance simulation
On Table 1 of 4 interpolation algorithm, H.264/AVC coding standards reference code JM7.3 encoding performance of the software simulation, performance simulation for coding test sequences of 8 parameters: (176 144, QCIF): A total of 39 (P frames: 20); test sequence file size: 1482624 bytes (YUV format); encoding parameter settings: (Search range: 16; reference frames: 5; encoding format: IPBPBP ...; quantitative parameters: QP = 28), the image of the eight test sequences used to simulate the results obtained encoded as shown in Table 2, the data from the table, you can see four kinds of fractional pixel interpolation method of coding performance comparison .
On Table 2 the results of the simulation code order, the encoder can be used in these four kinds of scores were pixel interpolation method, the coding sequence of eight tests, the average coding performance of visual comparison chart. Figure 1 left, said the luminance signal (Y) code, the average peak signal to noise ratio (PSNR); right picture that eight test sequences, the average compression rate.
1.3 Performance Analysis of interpolation coding
These three kinds of simplified fractional pixel interpolation methods (method 1 to 3), by the above simulation results show that: Only method 2 encoding H.264/AVC codec performance closest to the recommended standard interpolation algorithm (Method 4) encoding performance: 8 test sequences, the average PSNR luminance signal Y is only a small drop in PSNR calculated using the test data fall 0.011dB, the relative decline in the range of: 0.0299%; the same time, the coding compression method 2 only a small decline, calculated the average compression rate decreased 2.729-fold, the relative decline in the range of: 1.6392%. Interpolation method for the use of interpolation methods 2 and 4 are the coded and compressed files directly using the JM7.3 decoder for decoding performance tests, results showed that the test sequence after decoding there is no difference in subjective; Method 2, the average decoding signal to noise ratio (PSNR ), and H.264/AVC encoding and decoding standard recommended interpolation algorithm (method 4) of the decoding signal to noise ratio compared to only drop 0.064dB, the relative decline in rates: 0.18%. This you can see 4-order filter 1 / 2 pixel interpolation +1 / 4 pixel linear interpolation algorithm does not make adjustments to the encoding performance of the encoder significantly decreased, the adjusted scores of pixel interpolation algorithm (Method 2) is more practical and feasible.
