subject: Phase Noise And Jitter Jitter Attenuation With Crystal Oscillators [print this page] Clock signals provide reference timing to every integrated circuit and electrical system. While consumer applications typically use simple quartz crystals for reference clock generation, other applications have much more sophisticated timing requirements and often require a combination of clocks to provide synchronization, generation and distribution. In applications like wireless infrastructure and medical imaging, which require high fidelity analog to digital signal conversion, next-generation designs require higher resolution and faster data transmission rates.
Next-generation, high-performance networking and communications applications require faster transmission rates and higher speed data processing. In these applications, clock signals play a vital role in the overall architecture. If not designed properly, the system-level performance of these applications can be limited by the performance of the underlying timing solution. Special care must be taken during the device selection and hardware design process to ensure that the clocking design maximizes system performance.
Phase Noise and Jitter
The quality of a clock signal is heavily dependent on its phase noise and jitter. An ideal clock source would generate a pure sine wave. All signal power would be generated at one frequency. However, in actuality, all clock signals have some degree of phase-modulated noise. This noise spreads the power of the clock signal to adjacent frequencies, resulting in noise sidebands. The phase noise is typically expressed in dBc/Hz and represents the amount of signal power at a given sideband or offset frequency from the ideal clock frequency. Radio frequency (RF) and analog-to-digital data conversion (ADC) applications require very low phase noise clocks. In RF applications, increased phase noise can create channel-to-channel interference, degrading RF signal quality. In ADC applications, increased phase noise can limit the signal-to-noise ratio (SNR) and equivalent number of bits (ENOB) of the data converter.
Phase noise is the frequency domain representation of clock noise. Phase jitter, on the other hand, is the time domain instability of the clock signal and is typically expressed in picoseconds (ps). Jitter can be described as the random variation in the actual clock signal's edges versus its ideal waveform. Phase jitter is the figure of merit in high-speed digital applications including data communications, networking and high-definition video transmission. These applications require multi-gigabit data transmission rates as high as 40 Gbps. Physical-layer transceivers used in networking and HD video rely on low jitter reference clocks that are internally multiplied within the transceiver to clock the high-speed data transmitted from the device. Excessive jitter can lead to higher bit-error rates that may exceed system-level requirements.
