Ensuring Clock - Oscillator Performance

Ensuring the boundaries of performance in any digital system consists of evaluating

, for example, the setup/ hold time margins for each flip-flop within the system. In most systems today, voltage and temperature are varied to stress timing systems on nearly every board that ships. However, frequency margining has not been possible because of the lead times and minimum order quantity requirements associated with standard crystal oscillators. In many cases, it just is not possible to find or order oscillators providing frequencies only small percentages away from the nominal values (e.g. 5%).

Board Space

The Si534 has 8 pins and fits within the space of existing 6-pin 5 x 7 mm oscillator footprints. The additional 2 pins are used for frequency selection and are internally pulled high if left open. This configuration provides a high degree of flexibility since the device can be placed into an existing design with very little effort.

Quad-Frequency Outputs

Now it is possible to find nearly any frequency and have the margining rates completely integrated into one package. The Si534 from Silicon Laboratories provides support for frequency margining by synthesizing up to four output rates from one standard internal crystal. By specifying output frequencies at nominal, nominal plus margin, and nominal minus margin, the designer can easily stress the bounds of a design right along with voltage and temperature. Furthermore, no additional test time is required if the voltage, temperature, and frequency corners are all stressed simultaneously.

Test Costs

At first glance, replacing a low-cost oscillator with a more expensive quad-frequency oscillator may seem like a poor choice. However, it is worthwhile to consider the overall test costs associated with the existing approaches used to support frequency margining or the field failure rate associated when no frequency margining test plan is employed. For many designs, however, ignoring frequency margining is not an option. For these systems, consider the cost of either in-line, dedicated test hardware or equipment. A typical low-clock jitter frequency synthesizer can easily cost $10,000. Instead of this up front capital cost and external software control, a simple design change incorporating the Si534 and hardware to select the appropriate margining frequency during test is all that is required. Such a change allows for 100% coverage to the frequency margins.

Conclusion

Frequency margining can save time, money, and can assist in increasing overall test coverage, positively impacting outgoing quality by greatly reducing field failures. Furthermore, for many performance-sensitive designs, frequency margining is a basic manufacturing requirement for many designs. Si534 quad-frequency XO is the ideal solution to the problem of frequency margining. The Si534 can produce output frequencies from 10 MHz to 1.4 GHz with margins as close as a few parts-per-million (ppm) to as large as tens of percent of the center frequency. Margin frequencies are achieved in the same 5 x 7 mm footprint as many industry-standard crystal oscillator and require no external MUX.

Ensuring Clock - Oscillator Performance

By: Chris Bartik

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